基于FPGA的CAVLC解码器设计

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	基于FPGA的CAVLC解码器设计
	马雨然; 任超伟; 张文明
Source Publication	电子设计工程
Volume	25 Issue:21 Pages:120-124
	2017
Language	中文
ISSN	1674-6236
Document Type	期刊论文
Identifier	http://ir.ioe.ac.cn/handle/181551/8915
Collection	空天部
Recommended Citation GB/T 7714	马雨然,任超伟,张文明. 基于FPGA的CAVLC解码器设计[J]. 电子设计工程,2017,25(21):120-124.
APA	马雨然,任超伟,&张文明.(2017).基于FPGA的CAVLC解码器设计.电子设计工程,25(21),120-124.
MLA	马雨然,et al."基于FPGA的CAVLC解码器设计".电子设计工程 25.21(2017):120-124.

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