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基于FPGA的CAVLC解码器设计
马雨然; 任超伟; 张文明
2017
Source Publication电子设计工程
ISSN1674-6236
Volume25Issue:21Pages:120-124
Language中文
Document Type期刊论文
Identifierhttp://ir.ioe.ac.cn/handle/181551/8915
Collection空天部
Recommended Citation
GB/T 7714		 马雨然,任超伟,张文明. 基于FPGA的CAVLC解码器设计[J]. 电子设计工程,2017,25(21):120-124.
APA 马雨然,任超伟,&张文明.(2017).基于FPGA的CAVLC解码器设计.电子设计工程,25(21),120-124.
MLA 马雨然,et al."基于FPGA的CAVLC解码器设计".电子设计工程 25.21(2017):120-124.
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2017-1012.pdf（1868KB）期刊论文出版稿开放获取CC BY-NC-SAApplication Full Text
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