| Research on serial ATA hard disk initialization | |
| WEi Wu; Haibing Su; Qinzhang Wu | |
| Pages | 896- |
| 2009 | |
| Language | 英语 |
| Indexed By | Ei |
| Subtype | 会议论文 |
| Abstract | Serial ATA (SATA) is the successor of the Parallel ATA (PATA) interface. SATA overcomes many limitations of PATA and offers a maximum bandwidth of 300 MB/s. The Virtex-4 embedded multi-gigabit transcEiver (MGT) is compatible with SATA protocol. Combining MGT with the flexible configurable logic fabric and many specialized high-performance embedded features, Virtex-4 FPGA is an ideal single-chip solution for embedded SATA application. This paper presents how to implements SATA physical link initialization in Virtex-4 FPGA through the use of Out-of-Band (OOB) signals to synchronize and reset SATA hard disk. Dynamically changing attributes of MGT via the Dynamic Reconfiguration Port (DRP) is employed to improving usability and performance of the design. The whole design is validated on the Xilinx ML405 evaluation platform connecting to a SATA hard disk. The experiment results show that the design can complete SATA physical link initialization and establish communication link between SATA host controller in FPGA and hard disk.; Serial ATA (SATA) is the successor of the Parallel ATA (PATA) interface. SATA overcomes many limitations of PATA and offers a maximum bandwidth of 300 MB/s. The Virtex-4 embedded multi-gigabit transcEiver (MGT) is compatible with SATA protocol. Combining MGT with the flexible configurable logic fabric and many specialized high-performance embedded features, Virtex-4 FPGA is an ideal single-chip solution for embedded SATA application. This paper presents how to implements SATA physical link initialization in Virtex-4 FPGA through the use of Out-of-Band (OOB) signals to synchronize and reset SATA hard disk. Dynamically changing attributes of MGT via the Dynamic Reconfiguration Port (DRP) is employed to improving usability and performance of the design. The whole design is validated on the Xilinx ML405 evaluation platform connecting to a SATA hard disk. The experiment results show that the design can complete SATA physical link initialization and establish communication link between SATA host controller in FPGA and hard disk. |
| Conference Name | 2009 International Workshop on Intelligent Systems and Applications |
| Conference Date | 2009 |
| Document Type | 会议论文 |
| Identifier | http://ir.ioe.ac.cn/handle/181551/7509 |
| Collection | 光电测控技术研究室（三室） |
| Corresponding Author | WEi Wu |
| Affiliation | 中国科学院光电技术研究所 |
| Recommended Citation GB/T 7714 | WEi Wu,Haibing Su,Qinzhang Wu. Research on serial ATA hard disk initialization[C],2009:896-. |
| Files in This Item: | ||||||
| File Name/Size | DocType | Version | Access | License | ||
| 2009-178.pdf（314KB） | 会议论文 | 开放获取 | CC BY-NC-SA | Application Full Text | ||
Items in the repository are protected by copyright, with all rights reserved, unless otherwise indicated.
Edit Comment