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题名:
高速图像数据存储技术研究
作者: 徐启明
学位类别: 博士
答辩日期: 2008-06-10
授予单位: 中国科学院光电技术研究所
授予地点: 光电技术研究所
导师: 张启衡
关键词: 光电跟踪测量 ; 超高速图像存储 ; DDR模组阵列 ; 硬盘阵列存储 ; 脱机模式 ; Camera Link ; 现场可编程门阵列
其他题名: Technology research of high-speed image data storage
学位专业: 信号与信息处理
中文摘要:   在光电跟踪测量领域,随着技术的发展,传统的高速摄影胶片判读手段已被快速高效的视频图像判读所取代,数字图像高速存储系统已经成为光电跟踪测量系统的一个重要的分系统,是事后视频图像精确判读的基础。为了提高光电跟踪测量系统的测量精度,大都采用高帧频、大靶面图像传感器以提高时间分辨力和空间分辨力,而高帧频、大靶面图像传感器输出的图像数据量巨大,数据输出速率高,对数字图像存储系统的存储能力提出了极大的挑战。本文针对光电跟踪测量系统中对数字图像存储系统提出的超高速海量存储能力的需求,围绕光测设备数字图像高速存储系统的相关理论与技术展开了深入的研究,取得了重要的进展,并根据工程研制的需要设计了几种可行的技术方案并应用到工程实践中,得到满意的效果。   在充分研究ATA硬盘接口协议的基础上,采用Ultra DMA5数据传输模式和大容量图像缓存技术设计了基于FPGA的IDE硬盘阵列存储方案,通过集成在单个FPGA芯片内的多个硬盘控制器的并行工作成倍提升系统存储性能,满足了工程研制的需要。   为适应硬盘接口技术从并行ATA向串行ATA发展的趋势,在基于FPGA的IDE硬盘直写技术的基础上采用硬盘接口桥接芯片,将基于FPGA的IDE硬盘阵列存储方案进一步延伸到对SATA硬盘的支持,扩展了基于FPGA的IDE硬盘阵列存储方案的应用范围。   根据DDR动态存储器的高存储带宽的特点,深入研究DDR动态存储器的相关技术和标准协议,提出基于DDR模组阵列的超高速数字图像存储方案,并设计了实验系统。采用FPGA作为DDR模组阵列控制器,在完成单模组控制器设计的基础上,设计了单控制器的多模组阵列的阵列管理方案,扩展了存储容量。同时设计了双控制器并行工作方式以进一步提升系统的存储速率,满足了光电跟踪测量系统采用高帧频、大靶面图像传感器对数字图像存储系统提出的超高速存储能力的需求。   根据数字图像存储的要求,研究了数字相机Cameral Link接口规范,并设计了接收Cameral Link图像数据的接口电路,实现了数字相机与数字图像存储系统之间数字图像的高速传输,使数字图像存储系统兼容所有Camera Link接口的数字相机而具有广泛的适用性。   针对光电跟踪测量工程的特殊要求,图像存储系统必须与电视望远镜整装集成的情况,在研究TCP/IP协议的基础上,设计了基于FPGA的网络通信接口,解决了图像数据从光测设备到机下视频判读计算机系统的快速传输,实现了脱机模式的数字图像存储系统,并在多项工程中得到应用取得了良好的效果。
英文摘要:   In the field of Opto-Electronic track and measurement, with the development of technologies, the conventional interpreting method of photographic film was replaced with interpreting method of high-speed video image, and then the high-speed image storage system has been an important subsystem of Opto-Electronic tracking and measuring system and it is the basis of accurate interpreting. To improve the measure accuracy of system, high resolution high-speed image sensors are applied to obtain high resolution of time and space. However, the facts that the amount of image data of the high resolution high-speed image sensors is much great and the output speed of system is very fast, brings forward a great challenge to the storing capability of digital image storage system. For the requirement of ultra high-speed and great amount storage capability of digital image storage system in Opto-Electronic tracking and measuring system, in the paper, the related theories and technologies of digital image storage system of optical measuring device are deeply researched, and important progress is achieved. Then according to the request of projects, several feasible schemes are proposed and implemented in practice, which gain satisfying results.   Through the sufficient research of the interface standards of ATA hard disk, and by applying the Ultra DMA5 data transmitting model of ATA and image buffer of great amount, the FPGA based IDE hard disk array storage scheme is designed. By parallelizing several hard disk controllers integrated in single FPGA chip, the system storage performance is geminated and meets the requirement of practical project.   In order to be adaptive to the trend that the parallel ATA is gradually replaced with serial ATA, the FPGA based IDE hard disk array storage scheme is further extended to support the SATA by applying the bridge chip of hard disk, which extends the application fields of this storage scheme.   According to the character of the high storage bandwidth of DDR SDRAM, the related technologies and standards of DDR SDRAM are deeply researched, and the ultra high-speed digital image storage scheme based on DDR DIMM array is presented and the experimental system is designed. By using the FPGA as the controller of DDR DIMM, based on the design of single DDR DIMM with single controller, the manage scheme of multi-DDR DIMMs with single controller is designed to augment the storage capability greatly. In addition, the parallel model of dual controllers further improves storing speed of system. The scheme meets the requirement of high resolution high-speed sensors to digital image storage system.   According to the requirement of digital image storage system, the Cameral Link interface standards of digital camera are researched, and the receiving interface circuits are designed to accomplish the high speed transmission between digital camera and digital image storage system. As a result, the digital image storage system can be applied to all the cameras with Cameral Link interface and is great adaptive.   For the special requirement of Opto-Electronic tracking and measuring system that the image storage system should integrated with TV telescope, based on the research of TCP/IP protocol, The networks communication interface based on FPGA is designed to transmit digital image from optical measuring device to the computer system of interpretation, and realizes the digital image recording system which is computer-independent and performs well in several projects.
语种: 中文
内容类型: 学位论文
URI标识: http://ir.ioe.ac.cn/handle/181551/294
Appears in Collections:光电技术研究所博硕士论文_学位论文

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Recommended Citation:
徐启明. 高速图像数据存储技术研究[D]. 光电技术研究所. 中国科学院光电技术研究所. 2008.
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