IOE OpenIR  > 光电探测与信号处理研究室(五室)
单片机与FPGA/CPLD总线接口逻辑设计
游志宇; 董秀成; 杜杨; 张洪
Source Publication微计算机信息
Issue29Pages:121-123
2008
Language中文
ISSN1008-0570
Indexed By其他
Subtype期刊论文
Abstract设计一种基于MCS-51单片机与FPGA/CPLD的总线接口逻辑,实现单片机与可编程逻辑器件数据与控制信息的可靠通信,使可编程逻辑器件与单片机相结合,优势互补,组成灵活的、软硬件都可现场编程的控制系统。在设计中采用VHDL语言,实现MCS-51单片机与FPGA/CPLD的总线接口逻辑设计。试验表明,该总线接口逻辑工作稳定、可靠,使MCS-51单片机与FPGA/CPLD能够完美结合。
Document Type期刊论文
Identifierhttp://ir.ioe.ac.cn/handle/181551/1943
Collection光电探测与信号处理研究室(五室)
Recommended Citation
GB/T 7714
游志宇,董秀成,杜杨,等. 单片机与FPGA/CPLD总线接口逻辑设计[J]. 微计算机信息,2008(29):121-123.
APA 游志宇,董秀成,杜杨,&张洪.(2008).单片机与FPGA/CPLD总线接口逻辑设计.微计算机信息(29),121-123.
MLA 游志宇,et al."单片机与FPGA/CPLD总线接口逻辑设计".微计算机信息 .29(2008):121-123.
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