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题名:
实时图像处理中嵌入式硬件并行结构的研究
作者: 苏海冰
学位类别: 博士
答辩日期: 2007-06-13
授予单位: 中国科学院光电技术研究所
授予地点: 光电技术研究所
导师: 吴钦章
关键词: 实时图像处理 ; 并行结构 ; 嵌入式 ; 硬件算法 ; FPGA ; DSP
其他题名: Study on Hardware Architectures of Embedded Parallel System In Real-time Image Processing
学位专业: 光学工程
中文摘要: 论文旨在研究实时图像处理系统中的嵌入式硬件并行架构。在简单介绍了并行图像处理系统的发展历史和现状之后,就光学成像跟踪的应用场景对实时图像处理技术的迫切需求进行了分析。 针对图像识别在不同层次上的理解意义,深入分析了数字图像处理算法的结构特点,对点处理算法和邻域处理算法的操作模式与数据结构有了详细的描述,并在此基础上说明了数字图像处理的基本特征和适合于硬件并行处理的方法。 在分析了可扩展并行计算机系统的构成方式、互连网络和存储结构之后,对比其并行结构的继承性,对嵌入式硬件并行架构在实时图像处理上的设计方法和思想进行了说明,从器件的片内结构、片间或机群结构论证了主要硬件处理单元DSP和FPGA的并行处理能力,给出了用FPGA实现的多种硬件算法结构和性能分析,并对并行处理系统的可扩展性和异构性进行了理论分析。 通过介绍多DSP+FPGA的系统结构,详细分析了图像处理算法和硬件并行结构的配合能力,对多模跟踪算法的实现进行了细致的讨论。并就DSP和FPGA的处理性能进行了对比分析,指出了FPGA在实时图像处理算法实现上的强大硬件加速能力。 最后针对当前硬件结构中存在DSP之间通信能力弱的问题,在实时图像处理中直接影响到了难以突破100Hz的帧频限制,跟随最新器件的发展,提出了使用高速串行接口解决并行系统互连能力的方案。并针对人工神经网络对图像识别的巨大意义,提出了构建基于神经元的硬件并行结构的技术展望。
英文摘要: The purpose of this Ph D dissertation is to study the hardware architectures of embedded parallel system in real-time image processing. After simply introducing the developing history and the current situation of parallel image processing system, it analyses the urgent requirement of the parallel system for electro-optical detection. With responding to the hiberarchy of target automatic recognition and tracking, it analyses the structure character of digital image processing algorithms. Based on anatomizing operating mode and data structure of pixel processing and neighborhood processing, it researches the essential character of processing course and the suitable hardware parallel architectures for digital image processing algorithms. After analyzing the constitutes mode、interconnection network and storage structure of the extensible computer parallel system, by inheriting the comparability of parallel architectures, it brings up the design route and method of designing a embedded parallel system. It demonstrates the parallel processing potential of DSP and FPGA by analyzing the chip structure、board structure and equipment cluster, and it provides the hardware structures and processing performance in a achieved algorithms in FPGA. And it yet analyzes the expansibility and heterogeneity of parallel system in theoretics. By introducing a system architecture which are made up of multi-DSP and multi-FPGA, it demonstrates the integrated ability between software algorithms and hardware structure, and specify how to design a multiple-model tracking system in detail. After comparing the processing ability between DSP and FPGA, It indicates that the great ability exaltation during accomplishing algorithms function by using FPGA . Following the development of the latest component, it exhibit a thought to solve the communication bottle-neck between process unit by improve interconnection ability by using a high-speed serial on Gbit/S. And aiming at the importance significance of artificial neural networks in real-time image processing, it attempts to prospect the technique of establishing the hardware architectures based on nerve cell.
语种: 中文
内容类型: 学位论文
URI标识: http://ir.ioe.ac.cn/handle/181551/142
Appears in Collections:光电技术研究所博硕士论文_学位论文

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Recommended Citation:
苏海冰. 实时图像处理中嵌入式硬件并行结构的研究[D]. 光电技术研究所. 中国科学院光电技术研究所. 2007.
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